Core Responsibilities

• This candidate will work closely with our cryptography team and an external circuit design team to build and verify architecture designs on FPGA. The verified designs will either be sent out for tape-out manufacturing or as an FPGA-based product for early customer demo
• Writing clean, high-quality, high-performance, maintainable RTL code
• Participation in code reviews
• Implement Verilog RTL from a high-level description such as one in Matlab, Python or C

Requirements

Minimum Requirements

• Bachelor’s degree in Electrical Engineering or Computer Science
• Familiar with RTL simulation, timing analysis
• Familiar with FGPA digital validation and test pattern generation using logic analyzer and/or high-speed oscilloscope, etc
• Familiar with Xilinx FPGA process in memory
• Familiar with Xilinx IP design and packaging
• Familiar with at least one FPGA device
• Familiar with Custom IP and SoC integration is a plus

Interview process

1. Application - Resume review and email exchange.
2. 1st round interview - Technical review.
3. Work sample (optional)
4. 2nd round interview - Technical background interview with corporate partners.